The present invention relates to a technology which is effective for a semiconductor device having a clock oscillation circuit which generates a clock signal used for a circuit operation.
In a semiconductor device such as a microcomputer, a reduction in external components is required for a device size reduction, a cost reduction, and the like. Examples of the semiconductor device include one in which a clock oscillation circuit for generating a clock signal to be supplied to internal modules such as a CPU (Central Processing Unit) and a peripheral functional block is embedded.
In general, the semiconductor device further has a frequency divider for dividing the frequency of the clock signal generated by the clock oscillation circuit. The frequency divider is provided so as to increase clock frequency options to be chosen by selecting a frequency division ratio.
The clock oscillation circuit has, for example, a reference voltage generation circuit, a current generation circuit, a control circuit, a frequency-voltage conversion circuit, and an oscillation circuit. The frequency-voltage conversion circuit, the oscillation circuit, and the control circuit form a feedback loop.
The reference voltage generation circuit generates each of reference voltages VREFI and VREFC, and outputs the generated reference voltages VREFI and VREFC to the current generation circuit and the oscillation circuit. As the current generation circuit, a constant current generation circuit is used which outputs a substantially constant current based on the reference voltages.
Here, a current Iref having small power-supply/temperature dependence is generated. The frequency-voltage conversion circuit generates a voltage VSIG based on the current Iref generated by the current generation circuit, a capacitance, and a control signal generated by the control circuit.
The control circuit generates the control signal based on the clock signal generated by a voltage controlled oscillation circuit. The frequency-voltage conversion circuit generates a voltage based on the current generated by the current generation circuit, the capacitance, and the control signal generated by the control circuit from the clock signal outputted from the voltage controlled oscillation circuit. The oscillation circuit has an integration circuit.
The integration circuit changes the control voltage of the voltage controlled oscillation circuit such that the reference voltage VREFC generated by the reference voltage generation circuit is equal to the voltage VSIG outputted from the frequency-voltage conversion circuit to adjust the clock frequency to a desired frequency.
As an example of this type of clock oscillation circuit, there is known a clock oscillation circuit in which a current controlled oscillator, a frequency divider, a frequency comparison circuit, an integrator, and a voltage-current conversion circuit are coupled in series. By feed-backing an output current of the voltage-current conversion circuit in the final stage to the input side of the current controlled oscillator in the first stage, and using an output of the current controlled oscillator as an oscillation output, the stabilization of an oscillation frequency and an improvement in oscillation accuracy are intended to be achieved (see Patent Document 1).